Chapter 16
Appendix
Extension Instruction Specification XVI - 71
1) Precautions for describing word/halfword data multiply and accumulate instruction and high-speed mul-
tiply instruction
Word/halfword data multiply and accumulate instruction and high-speed multiply instruction are
executed by a common arithmetic unit. For this reason, the next high-speed multiply instruction must be
activated after the previous word/halfword data multiply and accumulate instruction has completed its
operation using a common arithmetic unit. Therefore, it is necessary to provide 1 cycle between
the preceding word/halfword data multiply and accumulate instruction and the succeeding high-speed
multiply instruction.
Figure:16.4.3 Drawing of Pipelining for Precaution (1)
This precaution is applicable to the following instructions:
<Word/halfword data multiply and accumulate instructions>
MAC, MACI, MACH, MACIH, MACU, MACIU, MACHU and MACIHU instructions
<High-speed multiply instructions>
MULQ, MULQI, MULQU and MULQIU instructions
DEC
Word/halfword data
multiply and
accumulate instruction
Insert 1 cycle
Arithmetic unit
available
High-speed multiply
instruction
Instruction
decoding
Instruction
decoding
Operation
Operation
Completion of multiply
and accumulate
instruction execution by
common arithmetic unit
EX
MEM
WB
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