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Panasonic MN103S

Panasonic MN103S
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Chapter 16
Appendix
Extension Instruction Specification XVI - 75
5) Precautions for describing byte data multiply and accumulate instruction and MCRH and MCRL access
instruction
When a byte data multiply and accumulate instruction and MCRH and MCRL access instruction are
executed, the result of the byte data multiply and accumulate instruction is used to execute the MCRH
and MCRL access instruction. For this reason, the next MCRH and MCRL access instruction must be
activated after the result of the byte data multiply and accumulate instruction, that is required for the
MCRH and MCRL access instruction, has been output. Therefore, it is necessary to provide 2 cycles
between the preceding byte data multiply and accumulate instruction and the succeeding MCRH and
MCRL access instruction.
Figure:16.4.7 Drawing of Pipelining for Precaution (5)
This precaution is applicable to the following instructions:
<Byte data multiply and accumulate instructions>
MACB, MACIB, MACBU and MACIBU instructions
<MCRH and MCRL access instructions>
PUTCX, CLRMAC, GETCHX and GETCLX instructions
DEC
Byte data multiply and
accumulate instruction
Insert 2 cycles
Result available
for reference
MCRH and MCRL access instruction
Instruction
decoding
Instruction
decoding
Operation Operation
Multiply and accumulate
instruction outputs the result
required for MCRH and MCRL
access instruction
EX
MEM
WB

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