Record of Changes - 3
V-22 bp
10,9,6,5,
2,1
Change
G12IE2 Timer13 compare/capture B interrupt
enable flag
G12IE1 Timer13 compare/capture A interrupt
enable flag
G12IR2 Timer13 compare/capture B interrupt
request flag
G12IR1 Timer13 compare/capture A interrupt
request flag
G12ID2 Timer13 compare/capture B interrupt
detection flag
G12ID1 Timer13 compare/capture A interrupt
detection flag
G12IE2 Timer13 compare B interrupt
enable flag
G12IE1 Timer13 compare A interrupt
enable flag
G12IR2 Timer13 compare B interrupt
request flag
G12IR1 Timer13 compare A interrupt
request flag
G12ID2 Timer13 compare B interrupt
detection flag
G12ID1 Timer13 compare A interrupt
detection flag
V-45 Note Add - If operationg the edge detection register... ,
and use as a port for monitor.
VIII
-43
Note Add - In reading out value of... Stop the timer in
order to read out the corrrect value.
IX-2 Table
9.1.1
Change Timer 12 Timer 13
Up/down count -
-
Timer 12 Timer 13
Up/down count O
O
IX-62 Setup
Proce-
dure (9)
Change bp1-0: TMB1-0=11
bp1-0: TMB1-0=00
IX-65 Setup
Proce-
dure (8)
Change bp5: TMAEG=1
bp5: TMAEG=0
Descripti
on (8)
Change (8) Set the TMAEG flag of the TM8MDA regis-
ter to "1
" to select the rising edge.
(8) Set the TMAEG flag of the TM8MDA regis-
ter to "0" to select the rising edge.
X-5 bp12 Change CLKSEL0 0:IOCLK
1:Setting disabled
CLKSEL0 0:IOCLK
1:MCLK
X-6 bp12 Change CLKSEL1 0:IOCLK
1:Setting disabled
CLKSEL1 0:IOCLK
1:MCLK
X-27 Setting
PWM
Output
Timing
Change ... The relationship between ... ... Set the SETENn flag of the PWMMDn regis-
ter to "1" to valid shift function of PWM output
timing. The relationship between ...
XI-2 Line 2 Change This LSI has an internal 24-bit binary counter...
used as an oscillation stabilization wait timer.
This LSI has an internal 24-bit binary counter...
used as an oscillation stabilization wait timer.
Table
11.1.1
Add - Forced-reset function
Figure
11.1.1
Change
Page Section Definition Previous Edition (Ver.1.1) New Edition (Ver.1.2)
Control register
Reset
1/2
WDCTR 16-bit binary counter
Reset
Clock source
selection
Control register
Interrupt counter
Reset
WDCTR 16-bit binary counter
ese
Clock source
selection
Hard reset signal
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