Chapter 2
CPU Basics
II - 14 Instructions
Table:2.5.3 Transfer Instructions
■ Arithmetic Operation Instructions
These instructions are used for the arithmetic operation between source operands, the results of which are stored
in a register. All of these instructions involve flag changes. The “+1” and “+4” operations, which are used fre-
quently in address calculations, are adopted as independent instructions.
Table:2.5.4 Arithmetic Operation Instructions
■ Comparison Instruction
This instruction is used to compare register data with other register data or an immediate value with register data.
The comparison instruction is used prior to the condition branching instruction. The comparison instruction
involves flag changes.
Table:2.5.5 Comparison Instruction
Instruction Description
MOV
Register-to-register word data transfer
Register-to-memory (or memory-to-register) word data transfer
Transfer of immediate value to register
MOVBU Register-to-memory (or memory-to-register) byte data transfer (zero expansion)
MOVHU Register-to-memory (or memory-to-register) half-word data transfer (zero expansion)
MOVM Register-to-memory (or memory-to-registers) data transfer
EXT 64-bit sign expansion of word data
EXTB 32-bit sign expansion of byte data
EXTBU 32-bit sign expansion of byte data
EXTH 32-bit zero expansion of byte data
EXTHU 32-bit zero expansion of half-word data
CLR Data clear
Instruction Description
ADD Addition
ADDC Addition with carry
SUB Subtraction
SUBC Subtraction with borrow
MUL Signed multiplication
MULU Multiplication with no sign
DIV Signed division
DIVU Division with no sign
INC Added with 1
INC4 Added with 4
Instruction Description
CMP Comparison
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