Chapter 2
CPU Basics
II - 16 Instructions
■ Branching Instructions
These instructions are used to make flow changes in program execution according to the given conditions. Condi-
tional branching instructions are classified into normal conditional branching instructions and loop-dedicated con-
ditional branching instructions. A loop-dedicated conditional branching instructions uses a dedicated register, thus
minimizing the branching penalty and ensuring high-speed loop execution. The subroutine call and return are pro-
vided with highly functional specifications which manipulate the PC, save and restore multiple registers to and
from the stack, and allocate and release stack area.
Table:2.5.9 Branching Instructions
■ NOP Instruction
This instruction does not execute anything, but it is possible to advance one-cycle time without having any influ-
ence on any resources by executing the NOP instruction.
Table:2.5.10 NOP Instruction
■ Extension Instructions
These instructions are defined for extension operation units of add-on type. An extension instruction uses a fixed
instruction format. The instruction map is reserved. This microcontroller incorporates 30 extension instructions
including high-speed multiplication and sum-of-products operation instructions. For instructions in detail, see
Appendix B Expansion Instruction Specifications.
Instruction Description
Bcc Conditional branching (PC-relative)
Lcc Loop-dedicated conditional branching
SETLB Set start of loop
JMP Non-conditional branching (PC-relative and register-indirect)
CALL Subroutine call (high-function type)
CALLS Subroutine call
RET Return from subroutine (high-function type)
RETF Return from subroutine (high-function, high-speed type)
RETS Return from subroutine
RTI Return from interrupt program
TRAP Subroutine call to fixed address
Instruction Description
NOP No operation
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