Panasonic MN103S

Chapter 3
Clock Generator
III - 4 Control Registers
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Set the register to become the oscillation frequency × PLL multiplication ratio of oscillation
frequency = 40 MHz to 60 MHz.
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When the PLLON and CKSEL [1:0] flags of the PCNT register are changed, reset the
PLLSEL flag to “0” before the change and set to “1” after waiting over 200 µs.
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