Philips LPC2101 - Page 212

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
User manual Rev. 01 — 12 January 2006 212
Philips Semiconductors
UM10161
Volume 1 Chapter 16: Timer2 and Timer3
(1) The capture registers are not available on TIMER3.
Fig 56. Timer2/3 block diagram
reset
MAXVAL
TIMER CONTROL REGISTER PRESCALE REGISTER
PRESCALE COUNTER
PCLK
enable
CAPTURE REGISTER 2
(1)
CAPTURE REGISTER 1
(1)
CAPTURE REGISTER 0
(1)
MATCH REGISTER 3
MATCH REGISTER 2
MATCH REGISTER 1
MATCH REGISTER 0
CAPTURE CONTROL REGISTER
CONTROL
TIMER COUNTER
CSN
TCI
CE
=
=
=
=
INTERRUPT REGISTER
EXTERNAL MATCH REGISTER
MATCH CONTROL REGISTER
MATn[3:0]
INTERRUPT
CAP2[2:0]
STOP ON MATCH
RESET ON MATCH
LOAD[3:0]