May 2002
16. GDP-32
II
DESIGN
16.1
BASIC DESIGN CHARACTERISTICS .................................. 2
16.2 RECEIVER LAYOUT................................................................ 4
16.3 CARD-PC MPU BOARD ........................................................... 8
16.4 BD287 FRONT PANEL BOARD .............................................. 8
16.5 BD183 ANALOG BOARD ....................................................... 10
RELAY FUNCTIONS ......................................................................................... 10
D
IFFERENTIAL AMPLIFIER .............................................................................. 10
T
HE OFFSET DAC.......................................................................................... 10
POWERLINE NOTCH FILTER ............................................................................ 13
GAIN STAGES.................................................................................................. 13
A
NTI-ALIAS FILTER......................................................................................... 13
MULTIPLEXER ................................................................................................ 13
A
NALOG-TO-DIGITAL CONVERTER .................................................................. 14
16.6 THE CALIBRATION AND TIMING BOARD..................... 18
THE CALIBRATE SECTION AND MULTIPLEXER .................................................. 18
OHMMETER.................................................................................................... 18
T
IMING SECTION ............................................................................................ 19
16.7 THE BATTERY COMPARTMENT ...................................... 23
SMALL CASE DESIGN (GDP-32
II
T) ................................................................. 23
LARGE CASE DESIGN ...................................................................................... 23
16.8 THE CRYSTAL OSCILLATOR ............................................ 23