Zonge GDP-32 - Page 338

GDP-32
II
DESIGN
Section 16, Page 15 May 2002
Figure 16.6 (a) – Block Diagram of the Calibrate and Timing Board (BD244 or BD288)
Duty Cycle
Period
4.980736 MHz
Crystal
Sample
CONVERT
2.490368 MHz
2
BINARY
DIVIDER
CHAIN
REAL TIME
CLOCK
BD244 or BD288
4
DAC
(DC Signal)
Temperature
Battery
Calibrate
(ACSignal)
Timing
Multiplexer
MUX
OHM
To
Analog
Boards
Col
Power
16 bit
D/A
Converter
(DAC)
Ohm
Power
Ohmeter
ImA / 100 u A
Inverter
+12v
+12v
GPS
Frequency
Discipline
BD288 (Optional)