Allwinner A20 - Page 101

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 101 / 812
1.7.3.5. NMI INTERRUPT PENDING REGISTER(DEFAULT: 0X00000000)
Offset:0x34
Register Name: NMI_IRQ_PEND_REG
Bit
Read/
Write
Default/Hex
Description
31:1
/
/
/
0
R/W
0x0
NMI_IRQ_SRC_PEND.
NMI Source Pending and Clear Bit.
0: NMI interrupt is not pending.
1: NMI interrupt is pending
1.7.3.6. NMI INTERRUPT ENABLE REGISTER(DEFAULT: 0X00000000)
Offset:0x38
Register Name: NMI_IRQ_ENABLE_REG
Bit
Read/
Write
Default/Hex
Description
31:1
/
/
/
0
R/W
0x0
NMI_IRQ_SRC_ENABLE.
NMI Source Enable and Disable Bit.
0: NMI interrupt is disable.
1: NMI interrupt is enable