Allwinner A20 - Page 163

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 163 / 812
Offset:
0x100+N*0x20
(N=0,1,2,3,4,5,6,7)
Register Name: NDMA_CTRL_REG
Bit
Read/
Write
Default/Hex
Description
11110 : USB EP4
11111 : USB EP5
15
R/W
0x0
BC_MODE_SEL.
BC mode select.
0 : normal mode(the value read back is equal to the value that
is written)
1 : remain mode(the value read back is equal to the remain
counter to be transfered).
14:11
/
/
/.
10:9
R/W
0x0
NDMA_SRC_DATA_WIDTH.
Normal DMA Source Data Width.
00: 8-bit
01: /
10: 32-bit
11: /
8:7
R/W
0x0
DMA_SRC_BST_LEN.
DMA Source Burst Length.
00: 1
01: /
10: 8
11: /.
6
R/W
0x0
DMA_SRC_SEC.
DMA Source Security.
0 : secure, 1 : non-secure.
5
R/W
0x0
NDMA_SRC_ADDR_TYPE.
Normal DMA Source Address Type.
0: Increment
1: No Change
4:0
R/W
0x0
NDMA_SRC_DRQ_TYPE.
Normal DMA Source DRQ Type.
00000 : IR0-RX
00001 : IR1-RX
00010 : SPDIF-RX
00011 : IIS0-RX