Allwinner A20 - Page 164

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 164 / 812
Offset:
0x100+N*0x20
(N=0,1,2,3,4,5,6,7)
Register Name: NDMA_CTRL_REG
Bit
Read/
Write
Default/Hex
Description
00100 : IIS1-RX
00101 : AC97-RX
00110 : IIS2-RX
00111 : /
01000 : UART0 RX
01001 : UART1 RX
01010 : UART2 RX
01011 : UART3 RX
01100 : UART4 RX
01101 : UART5 RX
01110 : UART6 RX
01111 : UART7 RX
10000 : HDMI DDC RX
10001 : USB EP1
10010 : /
10011 : Audio Codec A/D
10100 : /
10101 : SRAM(range : )
10110 : SDRAM
10111 : TP A/D
11000 : SPI0 RX
11001 : SPI1 RX
11010 : SPI2 RX
11011 : SPI3 RX
11100 : USB EP2
11101 : USB EP3
11110 : USB EP4
11111 : USB EP5
1.12.3.5. NORMAL DMA SOURCE ADDRESS REGISTER(DEFAULT: 0X00000000)
Offset: 0x100+N*0x20+0x4
(N=0,1,2,3,4,5,6,7)
Register Name: NDMA_SRC_ADDR_REG
Bit
Read/
Write
Default/Hex
Description
31:0
R/W
0x0
NDMA_SRC_ADDR.
Normal DMA Source Address.