A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 170 / 812
1.12.3.11. DEDICATED DMA BYTE COUNTER REGISTER
Offset:
0x300+N*0x20+0xC
(N=0,1,2,3,4,5,6,7)
Register Name: DDMA_BC_REG
DDMA_BC.
Dedicated DMA Byte Counter.
Note: If ByteCounter=0, DMA will transfer no byte. The maximum value is 16M.
1.12.3.12. DEDICATED DMA PARAMETER REGISTER
Offset:
0x300+N*0x20+0x18
(N=0,1,2,3,4,5,6,7)
Register Name: DDMA_PARA_REG
DEST_DATA_BLK_SIZE.
Destination Data Block Size n.
DEST_WAIT_CYC.
Destination Wait Clock Cycles n
SRC_DATA_BLK_SIZE.
Source Data Block Size n.
SRC_WAIT_CYC.
Source Wait Clock Cycles n.
Note: If the counter=N, the value is N+1.