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Allwinner A20 - Page 180

Allwinner A20
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A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 180 / 812
Offset:0x10
Register Name: AC_DAC_ACTRL
Bit
R/W
Default
Description
0: Mute
1: Not mute
6
R/W
0x0
PAMUTE.
All input source to PA mute, including Output mixer and Internal
DAC, (): 0:Mute
1: Not mute
5:0
R/W
0x0
PAVOL.
PA Volume Control, (PAVOL): Total 64 level, from 0dB to -62dB,
1dB/step,mute when 000000
1.13.4.6. DAC/ADC ANALOG PERFORMANCE TUNING REGISTER
Offset:0x14
Register Name: AC_ADDA_BIAS_CTRL
Bit
R/W
Default
Description
31:0
/
/
/
1.13.4.7. ADC FIFO CONTROL REGISTER
Offset: 0x1C
Register Name: AC_ADC_FIFOC
Bit
Read/Write
Default
Description
31:29
R/W
0x0
ADFS.
Sample Rate of ADC
000: 48KHz
010: 24KHz
100: 12KHz
110: Reserved
001: 32KHz
011: 16KHz
101: 8KHz
111: Reserved
28
R/W
0x0
EN_AD.
ADC Digital Part Enable, en_ad
0: Disable
1: Enable

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