Allwinner A20 - Page 184

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 184 / 812
Offset:0x28
Register Name: AC_PA_ADC_ACTRL
Bit
R/W
Default
Description
0-Disable
1-Enable
27
R/W
0x0
VMICEN.
VMIC pin voltage enable
0: disable
1: enable
26:23
/
/
/
22:20
R/W
0x3
ADCG.
ADC Input Gain Control
000: -4.5dB
001: -3dB
010: -1.5dB
011: 0dB
100: 1.5dB
101: 3dB
110: 4.5dB
111: 6dB
19:17
R/W
0x2
ADCIS.
ADC input source select
000: left select LINEINL, right select LINEINR; or, both select
LINEINL-LINEINR, depending on LNRDF (bit 16)
001: left channel select FMINL & right channel select FMINR
010: left and right channel both select MIC1 gain stage output
011: left and right channel both select MIC2 gain stage output
100: left select MIC1 gain stage output & right select MIC2 gain
stage output
101: left and right both select MIC1 gain stage plus MIC2 gain
stage output
110: left select output mixer L & right select output Mixer right
111: left select LINEINL or LINEINL-LINEINR, depending on
LNRDF (bit 16), right select MIC1 gain stage
16
R/W
0x0
LNRDF.
Line-in-r function define
0: Line-in right channel which is independent of line-in left channel
1: negative input of line-in left channel for fully differential
application
15:13
R/W
0x4
LNPREG.