Allwinner A20 - Page 213

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 213 / 812
16
R/W
0x0
FIFO_DATA_PENDING.
TP FIFO Data Available pending Bit
0: NO Pending IRQ
1: FIFO Available Pending IRQ
Write ‘1’ to clear this interrupt or automatic clear if interrupt
condition fails
15:13
/
/
/
12:8
R
0x0
RXA_CNT.
TP FIFO available Sample Word Counter
7:3
/
/
/
2
R
0x0
TP_IDLE_FLG.
Touch Panel Idle Flag
0: idle
1: not idle
1
R/W
0x0
TP_UP_PENDING.
Touch Panel Last Touch (Stylus Up) IRQ Pending bit
0: No IRQ
1: IRQ
Notes: Writing 1 to the bit will clear it and its corresponding
interrupt if the interrupt is enable.
0
R/W
0x0
TP_DOWN_PENDING.
Touch Panel First Touch (Stylus Down) IRQ Pending bit
0: No IRQ
1: IRQ
Notes: Writing 1 to the bit will clear it and its corresponding
interrupt if the interrupt is enable.
1.15.7.7. TP TEMPERATURE PERIOD REGISTER
Offset: 0x18
Register Name: TP_TPR
Bit
Read/
Write
Default/
Hex
Description
31:16
/
/
/
16
R/W
0x0
TEMP_EN.
Temperature enable
15:0
R/W
0x0
TEMP_PER.
Temperature Period