Allwinner A20 - Page 243

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 243 / 812
Offset: 0x08
Register Name: PA_CFG2
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
6:4
R/W
0
PA17_SELECT
000: Input 001: Output
010: ETXERR 011: CAN_RX
100: UART1_RING 101: GNULL/ETXERR
110: I2S1_DI 111: Reserved
3
/
/
/
2:0
R/W
0
PA16_SELECT
000: Input 001: Output
010: ECOL 011: CAN_TX
100: UART1_DCD 101: GCLKIN/ECOL
110: I2S1_DO 111: Reserved
1.19.4.4. PA CONFIGURE REGISTER 3
Offset: 0x0C
Register Name: PA_CFG3
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
/
/
/
1.19.4.5. PA DATA REGISTER
Offset: 0x10
Register Name: PA_DAT
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:18
/
/
/
17:0
R/W
0
PA_DAT
If the port is configured as input, the corresponding bit is the
pin state. If the port is configured as output, the pin state is the
same as the corresponding bit. The read bit value is the value
setup by software. If the port is configured as functional pin,
the undefined value will be read.