Allwinner A20 - Page 262

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 262 / 812
Offset: 0x70
Register Name: PD_CFG1
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
000: Input 001: Output
010: LCD0_D10 011: LVDS1_VP0
100: Reserved 101: Reserved
110: Reserved 111: Reserved
7
/
/
/
6:4
R/W
0
PD9_SELECT
000: Input 001: Output
010: LCD0_D9 011: LVDS0_VN3
100: Reserved 101: Reserved
110: Reserved 111: Reserved
3
/
/
/
2:0
R/W
0
PD8_SELECT
000: Input 001: Output
010: LCD0_D8 011: LVDS0_VP3
100: Reserved 101: Reserved
110: Reserved 111: Reserved
1.19.4.30. PD CONFIGURE REGISTER 2
Offset: 0x74
Register Name: PD_CFG2
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31
/
/
/
30:28
R/W
0
PD23_SELECT
000: Input 001: Output
010: LCD0_D23 011: SMC_DET
100: Reserved 101: Reserved
110: Reserved 111: Reserved
27
/
/
/
26:24
R/W
0
PD22_SELECT
000: Input 001: Output
010: LCD0_D22 011: SMC_VPPPP