Allwinner A20 - Page 278

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 278 / 812
Offset: 0xE4
Register Name: PG_CFG3
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
/
/
/
1.19.4.59. PG DATA REGISTER
Offset: 0xE8
Register Name: PG_DAT
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:12
/
/
/
11:0
R/W
0
PG_DAT
If the port is configured as input, the corresponding bit is the
pin state. If the port is configured as output, the pin state is the
same as the corresponding bit. The read bit value is the value
setup by software. If the port is configured as functional pin,
the undefined value will be read.
1.19.4.60. PG MULTI-DRIVING REGISTER 0
Offset: 0xEC
Register Name: PG_DRV0
Default Value: 0x0555_5555
Bit
Read/Write
Default
Description
31:20
/
/
/
[2i+1:2i]
(i=0~11)
R/W
0x1
PG_DRV
PG[n] Multi-Driving Select (n = 0~11)
00: Level 0 01: Level 1
10: Level 2 11: Level 3
1.19.4.61. PG MULTI-DRIVING REGISTER 1
Offset: 0xF0
Register Name: PG_DRV1
Default Value: 0x0000_0000