Allwinner A20 - Page 277

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 277 / 812
Offset: 0xDC
Register Name: PG_CFG1
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
10:8
R/W
0
PG10_SELECT
000: Input 001: Output
010: TS1_D6 011: CSI1_D6
100: UART4_TX 101: CSI0_D14
110: Reserved 111: Reserved
7
/
/
/
6:4
R/W
0
PG9_SELECT
000: Input 001: Output
010:TS1_D5 011: CSI1_D5
100: UART3_CTS 101: CSI0_D13
110: Reserved 111: Reserved
3
/
/
/
2:0
R/W
0
PG8_SELECT
000: Input 001: Output
010: TS1_D4 011: CSI1_D4
100: UART3_RTS 101: CSI0_D12
110: Reserved 111: Reserved
1.19.4.57. PG CONFIGURE REGISTER 2
Offset: 0xE0
Register Name: PG_CFG2
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
/
/
/
1.19.4.58. PG CONFIGURE REGISTER 3
Offset: 0xE4
Register Name: PG_CFG3
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description