Allwinner A20 - Page 283

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 283 / 812
1.19.4.66. PH CONFIGURE REGISTER 2
Offset: 0x104
Register Name: PH_CFG2
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31
/
/
/
30:28
R/W
0
PH23_SELECT
000: Input 001: Output
010: LCD1_D23 011: ETXEN
100: KP_OUT3 101: SDC1_CLK
110: Reserved 111: CSI1_D23
27
/
/
/
26:24
R/W
0
PH22_SELECT
000: Input 001: Output
010: LCD1_D22 011: EMDIO
100: KP_OUT2 101: SDC1_CMD
110: Reserved 111: CSI1_D22
23
/
/
/
22:20
R/W
0
PH21_SELECT
000: Input 001: Output
010: LCD1_D21 011: EMDC
100: CAN_RX 101: Reserved
110: EINT21 111: CSI1_D21
19
/
/
/
18:16
R/W
0
PH20_SELECT
000: Input 001: Output
010: LCD1_D20 011: ERXDV
100: CAN_TX 101: Reserved
110: EINT20 111: CSI1_D20
15
/
/
/
14:12
R/W
0
PH19_SELECT
000: Input 001: Output
010: LCD1_D19 011: ERXERR
100: KP_OUT1 101: SMC_SDA
110: EINT19 111: CSI1_D19
11
/
/
/
10:8
R/W
0
PH18_SELECT