Allwinner A20 - Page 294

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 294 / 812
Offset: 0x200
Register Name: PIO_INT_CFG0
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
(i=0~7)
External INTn Mode (n = 0~7)
0x0: Positive Edge
0x1: Negative Edge
0x2: High Level
0x3: Low Level
0x4: Double Edge (Positive/ Negative)
Others: Reserved
1.19.4.82. PIO INTERRUPT CONFIGURE REGISTER 1
Offset: 0x204
Register Name: PIO_INT_CFG1
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
[4i+3:4i]
(i=0~7)
R/W
0
PIO_INT_CFG
External INTn Mode (n = 8~15)
0x0: Positive Edge
0x1: Negative Edge
0x2: High Level
0x3: Low Level
0x4: Double Edge (Positive/ Negative)
Others: Reserved
1.19.4.83. PIO INTERRUPT CONFIGURE REGISTER 2
Offset: 0x208
Register Name: PIO_INT_CFG2
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:24
/
/
/
[4i+3:4i]
(i=0~5)
R/W
0
PIO_INT_CFG
External INTn Mode (n = 16~21)
0x0: Positive Edge