Allwinner A20 - Page 295

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 295 / 812
Offset: 0x208
Register Name: PIO_INT_CFG2
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
0x1: Negative Edge
0x2: High Level
0x3: Low Level
0x4: Double Edge (Positive/ Negative)
Others: Reserved
1.19.4.84. PIO INTERRUPT CONFIGURE REGISTER 3
Offset: 0x20C
Register Name: PIO_INT_CFG3
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
/
/
/
1.19.4.85. PIO INTERRUPT CONTROL REGISTER
Offset: 0x210
Register Name: PIO_INT_CTL
Default Value: 0x0000_0000
Bit
Read/Wri
te
Default
Description
[n]
(n=0~21)
R/W
0
PIO_INT_CTL
External INTn Enable (n = 0~21)
0: Disable
1: Enable
1.19.4.86. PIO INTERRUPT STATUS REGISTER
Offset: 0x214
Register Name: PIO_INT_STATUS
Default Value: 0x0000_0000
Bit
Read/Writ
e
Default
Description