Allwinner A20 - Page 32

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 32 / 812
Offset: 0x280
Register Name: OSC24M_CNT64_CTRL_REG
Bit
Read/
Write
Default/Hex
Description
it will change to zero after the registers are cleared.
Note: This 64-bit counter will start to count as soon as the System Power On finishes.
1.4.3.17. OSC24M 64-BIT COUNTER LOW REGISTER (DEFAULT: 0X00000000)
Offset: 0x284
Register Name: OSC24M_CNT64_LOW_REG
Bit
Read/
Write
Default/Hex
Description
31:0
R/W
0x0
CNT64_LO.
64-bit Counter [31:0].
1.4.3.18. OSC24M 64-BIT COUNTER HIGH REGISTER (DEFAULT: 0X00000000)
Offset: 0x288
Register Name: OSC24M_CNT64_HIGH_REG
Bit
Read/
Write
Default/Hex
Description
31:0
R/W
0x0
CNT64_HI.
64-bit Counter [63:32].
1.4.3.19. LOSC 64-BIT COUNTER CONTROL REGISTER (DEFAULT: 0X00000000)
Offset: 0x290
Register Name: LOSC_CNT64_CTRL_REG
Bit
Read/
Write
Default/Hex
Description
31:3
/
/
/.
2
R/W
0x0
CNT64_CLK_SRC_SEL.
64-bit Counter Clock Source Select.
0: LOSC
1: /
1
R/W
0x0
CNT64_RL_EN.
64-bit Counter Read Latch Enable.
0: no effect, 1: to latch the 64-bit Counter to the Low/Hi
registers and it will change to zero after the registers are