Allwinner A20 - Page 337

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 337 / 812
Offset: 0xEC
Register Name: MP_OUTH4ADD_REG
Bit
Read/W
rite
Default/He
x
Description
Output channel 2
High 4bits address in bits
15:12
/
/
/
11:8
R/W
0
OUTCH1_H4ADD
Output channel 1
High 4bits address in bits
7:4
/
/
/
3:0
R/W
0
OUTCH0_H4ADD
Output channel 0
High 4bits address in bits
3.1.4.30. OUTPUT ADDRESS LOW 32BITS REGISTER
Offset:
Out channel 0:0xF0
Out channel 1:0xF4
Out channel 2:0xF8
Register Name: MP_OUTL32ADD_REG
Bit
Read/W
rite
Default/He
x
Description
31:0
R/W
0
OUT_L32ADD
Output channel
Low 32bits address in bits
3.1.4.31. OUTPUT LINE WIDTH REGISTER
Offset:
Out channel 0:0x100
Out channel 1:0x104
Out channel 2:0x108
Register Name: MP_OUTLINEWIDTH_REG
Bit
Read/W
rite
Default/He
x
Description
31:0
R/W
0
OUT_LINEWIDTH
Output channel