Allwinner A20 - Page 398

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 398 / 812
4.2.6.11. CSI CHANNEL_0 OUTPUT BUFFER CONTROL REGISTER
Offset Address: 0X0028
Register Name: CSI1_BUF_CTL_REG
Bit
Read/W
rite
Default/
Hex
Description
31:03
/
/
/
02
R/W
0
DBN
Buffer selected at next storing for CSI
0: Next buffer selection is buffer-A
1: Next buffer selection is buffer-B
01
R
0
DBS
output buffer selected status
0: Selected output buffer-A
1: Selected output buffer-B
00
R/W
0
DBE
Double buffer mode enable
0: disable
1: enable
If the double buffer mode is disabled, the buffer-A will be always
selected by CSI module.
4.2.6.12. CSI CHANNEL_0 STATUS REGISTER
Offset Address: 0X002C
Register Name: CSI1_BUF_STA_REG
Bit
Read/W
rite
Default/
Hex
Description
31:08
R
0
LUM_STATIS
luminance statistical value
When frame done interrupt flag come, value is ready and will last
until next frame done.
For raw data, value = (G>>1+R+G)>>8
For yuv422, value = Y>>8
07:02
/
/
/
01
R
0
VCAP_STA
Video capture in progress
Indicates the CSI is capturing video image data (multiple
frames). The bit is set at the start of the first frame after enabling