Allwinner A20 - Page 463

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 463 / 812
Offset: 0x20c
Register name: PLL_Dbg0
Bits
Read
/Write
Default
/Hex
Description
20
R/W
0
VCO_RST_IN
19
R/W
0
VREG2_OUT_EN
18
R/W
0
VREG1_OUT_EN
17
R/W
0
REG_OD1
16
R/W
0
REG_OD
15:14
/
/
reserved
13:8
R/W
0
B_IN
7:6
/
/
reserved
5:0
R/W
0
CNT_INT
5.2.4.28. PLL/DRV SETTING 4: PLL DBG0
Offset: 0x210
Register name: PLL_Dbg1
Bits
Read
/Write
Default
/Hex
Description
31:25
/
/
reserved
24
R/W
0
Lock_flag2
23:17
/
/
reserved
16
R/W
0
Lock_flag1
15:10
/
/
reserved
9
R/W
0
Error_sf
8
R/W
0
Error_sfdet
7:6
/
/
reserved
5:0
R/W
0
PLL_BNSI
5.2.4.29. PLL/DRV SETTING 5: HPD/CEC
Offset: 0x214
Register name: HPD_CEC