Allwinner A20 - Page 481

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 481 / 812
Register Name
Offset
Description
DEFE_CH0_VERTPHASE1_R
EG
0x0118
DEFE Channel 0 Vertical Initial Phase 1
Register
DEFE_CH0_HORZTAP0_RE
G
0x0120
DEFE Channel 0 Horizontal Tap Offset 0
Register
DEFE_CH0_HORZTAP1_RE
G
0x0124
DEFE Channel 0 Horizontal Tap Offset 1
Register
DEFE_CH0_VERTTAP_REG
0x0128
DEFE Channel 0 Vertical Tap Offset Register
DEFE_CH1_INSIZE_REG
0x0200
DEFE Channel 1 Input Size Register
DEFE_CH1_OUTSIZE_REG
0x0204
DEFE Channel 1 Output Size Register
DEFE_CH1_HORZFACT_RE
G
0x0208
DEFE Channel 1 Horizontal Factor Register
DEFE_CH1_VERTFACT_RE
G
0x020C
DEFE Channel 1 Vertical factor Register
DEFE_CH1_HORZPHASE_R
EG
0x0210
DEFE Channel 1 Horizontal Initial Phase
Register
DEFE_CH1_VERTPHASE0_R
EG
0x0214
DEFE Channel 1 Vertical Initial Phase 0
Register
DEFE_CH1_VERTPHASE1_R
EG
0x0218
DEFE Channel 1 Vertical Initial Phase 1
Register
DEFE_CH1_HORZTAP0_RE
G
0x0220
DEFE Channel 1 Horizontal Tap Offset 0
Register
DEFE_CH1_HORZTAP1_RE
G
0x0224
DEFE Channel 1 Horizontal Tap Offset 1
Register
DEFE_CH1_VERTTAP_REG
0x0228
DEFE Channel 1 Vertical Tap Offset Register
DEFE_CH0_HORZCOEF0_R
EGN
0x0400+N*4
DEFE Channel 0 Horizontal Filter Coefficient
Register N=0:31
DEFE_CH0_HORZCOEF1_R
EGN
0x0480+N*4
DEFE Channel 0 Horizontal Filter Coefficient
Register N=0:31
DEFE_CH0_VERTCOEF_RE
GN
0x0500+N*4
DEFE Channel 0 Vertical Filter Coeffient
Register N=0:31
DEFE_CH1_HORZCOEF0_R
EGN
0x0600+N*4
DEFE Channel 1 Horizontal Filter Coeffient
Register N=0:31
DEFE_CH1_HORZCOEF1_R
EGN
0x0680+N*4
DEFE Channel 1 Horizontal Filter Coeffient
Register N=0:31
DEFE_CH1_VERTCOEF_RE
GN
0x0700+N*4
DEFE Channel 1 Vertical Filter Coeffient
Register N=0:31
DEFE_VPP_EN_REG
0x0A00
DEFE Video Post Process Enable Register
DEFE_VPP_DCTI_REG
0x0A04
DEFE Video Post Process Digital Chroma