Allwinner A20 - Page 483

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 483 / 812
Offset: 0x4
Register Name: DEFE_FRM_CTRL_REG
Bit
Read/
Write
Default/H
ex
Description
16
R/W
0x0
FRM_START
Frame start & reset control
0: reset
1: start
If the bit is written to zero, the whole state machine and data
paths of DEFE module will be reset.
When the bit is written to 1, DEFE will start a new frame process.
15
/
/
/
14:12
R/W
0x0
IN_CTRL
DEFE input source control
000: from dram
100: from DEBE0 interface of DEBE2lcd (don’t influence the
interface timing of DEBE)
101: from DEBE1 interface of DEBE2lcd(don’t influence the
interface timing of DEBE)
110: from DEBE0(influence the interface timing of DEBE)
111: from DEBE1(influence the interface timing of DEBE)
Other: reserved
11
R/W
0x0
OUT_CTRL
DEFE output control
0: enable DEFE output to DEBE
1: disable DEFE output to DEBE
If DEFE write back function is enable, DEFE output to DEBE isn’t
recommended.
10
/
/
/
9:8
R/W
0x0
OUT_PORT_SEL
DEFE output port select
00: DEBE0
01: DEBE1
other: reserved
7:3
/
/
/
2
R/W
0x0
WB_EN
Write back enable