Allwinner A20 - Page 5

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 5 / 812
1.14.1. Overview ............................................................................................................... 190
1.14.2. LRADC Block Diagram ......................................................................................... 191
1.14.3. LRADC Register List ............................................................................................. 191
1.14.4. LRADC Register Description ................................................................................ 192
1.15. TP ........................................................................................................................................ 198
1.15.1. Overview ............................................................................................................... 198
1.15.2. Typical Application Circuit ..................................................................................... 199
1.15.3. TP Clock Tree ....................................................................................................... 199
1.15.4. A/D Conversion Time ............................................................................................ 199
1.15.5. Principle of Operation ........................................................................................... 201
1.15.6. TP Register List..................................................................................................... 206
1.15.7. TP Register Description ........................................................................................ 207
1.16. Security System ................................................................................................................... 217
1.16.1. Overview ............................................................................................................... 217
1.16.2. Security System Block Diagram ........................................................................... 218
1.16.3. Security System Register List ............................................................................... 218
1.16.4. Security System Register Description .................................................................. 219
1.17. Security JTAG ..................................................................................................................... 226
1.17.1. Overview ............................................................................................................... 226
1.17.2. Security JTAG Register List .................................................................................. 227
1.17.3. Security JTAG Register Description ..................................................................... 227
1.18. Security ID ........................................................................................................................... 229
1.18.1. Overview ............................................................................................................... 229
1.18.2. SID Block Diagram ................................................................................................ 230
1.19. Port Controller ..................................................................................................................... 231
1.19.1. Port Description .................................................................................................... 231
1.19.2. Port Configuration Table ....................................................................................... 232
1.19.3. Port Register List .................................................................................................. 238
1.19.4. Port Register Description ...................................................................................... 239
Chapter 2 Memory ................................................................................................................................ 297
2.1. DRAM .................................................................................................................................. 298
2.1.1. Overview ...................................................................................................................... 298
2.2. NAND Flash ......................................................................................................................... 299
2.2.1. Overview ...................................................................................................................... 299
2.2.2. Nand Flash Block Diagram .......................................................................................... 300
2.2.3. NFC Timing Diagram .................................................................................................... 301
2.2.4. NFC Operation Guide .................................................................................................. 306
Chapter 3 Graphic ................................................................................................................................ 309
3.1. Mixer Processor ................................................................................................................... 310
3.1.1. Overview ...................................................................................................................... 310
3.1.2. Mixer Processor Block Diagram ................................................................................... 311
3.1.3. MP Register List ........................................................................................................... 311
3.1.4. MP Register Description .............................................................................................. 313
Chapter 4 Image ................................................................................................................................... 353
4.1. CSI0 ..................................................................................................................................... 354
4.1.1. Overview ...................................................................................................................... 354
4.1.2. CSI0 Block Diagram ..................................................................................................... 355
4.1.3. CSI0 Description .......................................................................................................... 355
4.1.4. CSI0 Register List ........................................................................................................ 358
4.1.5. CSI0 Register Description ............................................................................................ 360
4.2. CSI1 ..................................................................................................................................... 388
4.2.1. Overview ...................................................................................................................... 388
4.2.2. CSI1 Block Diagram ..................................................................................................... 389
4.2.3. CSI1 Description .......................................................................................................... 389