Allwinner A20 - Page 6

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 6 / 812
4.2.4. CSI1 Timing Diagram ................................................................................................... 389
4.2.5. CSI1 Register List ........................................................................................................ 390
4.2.6. CSI1 Register Description ............................................................................................ 391
4.3. TV Decoder.......................................................................................................................... 403
4.3.1. Overview ...................................................................................................................... 403
Chapter 5 Display ................................................................................................................................. 404
5.1. TCON ................................................................................................................................... 406
5.1.1. Overview ...................................................................................................................... 406
5.1.2. TCON Block Diagram ................................................................................................... 407
5.1.3. TCON Register List ...................................................................................................... 408
5.1.4. TCON Register Description.......................................................................................... 410
5.2. HDMI .................................................................................................................................... 436
5.2.1. Overview ...................................................................................................................... 436
5.2.2. HDMI Block Diagram .................................................................................................... 437
5.2.3. HDMI Control Register Description .............................................................................. 437
5.2.4. HDMI Register Description........................................................................................... 439
5.3. Display Engine Frontend ..................................................................................................... 477
5.3.1. Overview ...................................................................................................................... 477
5.3.2. DEFE Block Diagram ................................................................................................... 478
5.3.3. DEFE Register List ....................................................................................................... 478
5.3.4. DEFE Register Description .......................................................................................... 482
5.4. Display Engine Backend ..................................................................................................... 528
5.4.1. Overview ...................................................................................................................... 528
5.4.2. Display Engine Block Diagram ..................................................................................... 529
5.4.3. DEBE Register list ........................................................................................................ 529
5.4.4. DEBE Register Description .......................................................................................... 532
5.5. TV Encoder .......................................................................................................................... 574
5.5.1. Overview ...................................................................................................................... 574
Chapter 6 Interface ............................................................................................................................... 575
6.1. SD/MMC .............................................................................................................................. 576
6.1.1. Overview ...................................................................................................................... 576
6.1.2. SD/MMC Timing Diagram ............................................................................................ 576
6.2. TWI ...................................................................................................................................... 577
6.2.1. Overview ...................................................................................................................... 577
6.2.2. TWI Controller Timing Diagram .................................................................................... 578
6.2.3. TWI Controller Register List ......................................................................................... 578
6.2.4. TWI Register Description ............................................................................................. 579
6.2.5. TWI Controller Special Requirement............................................................................ 587
6.3. SPI ....................................................................................................................................... 589
6.3.1. Overview ...................................................................................................................... 589
6.3.2. SPI Timing Diagram ..................................................................................................... 590
6.3.3. SPI Register List........................................................................................................... 591
6.3.4. SPI Register Description .............................................................................................. 592
6.3.5. SPI Special Requirement ............................................................................................. 606
6.4. UART ................................................................................................................................... 607
6.4.1. Overview ...................................................................................................................... 607
6.4.2. UART Timing Diagram ................................................................................................. 608
6.4.3. UART Register List ....................................................................................................... 608
6.4.4. UART Register Description .......................................................................................... 609
6.4.5. UART Special Requirement ......................................................................................... 627
6.5. PS2 ...................................................................................................................................... 630
6.5.1. Overview ...................................................................................................................... 630
6.5.2. PS2 Block Diagram ...................................................................................................... 631
6.5.3. PS2 Timing Diagram .................................................................................................... 631