Allwinner A20 - Page 536

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 536 / 812
5.4.4.6. DE-LAYER FRAME BUFFER LINE WIDTH REGISTER
Offset:
Layer 0: 0x840
Layer 1: 0x844
Layer 2: 0x848
Layer 3: 0x84C
Register Name: DEBE_LAYLINEWIDTH_REG
Bit
Read/W
rite
Default/
Hex
Description
31:0
R/W
UDF
LAY_LINEWIDTH
Layer frame buffer line width in bits
Note: If the layer is selected by video channel or YUV channel, the setting of this register will be
ignored.
5.4.4.7. DE-LAYER FRAME BUFFER LOW 32 BIT ADDRESS REGISTER
Offset:
Layer 0: 0x850
Layer 1: 0x854
Layer 2: 0x858
Layer 3: 0x85C
Register Name: DEBE_LAYFB_L32ADD_REG
Bit
Read/W
rite
Default/
Hex
Description
31:0
R/W
UDF
LAYFB_L32ADD
Buffer start Address
Layer Frame start Buffer Address in bit
Note: If the layer is selected by video channel or YUV channel, the setting of this register will
be ignored.
5.4.4.8. DE-LAYER FRAME BUFFER HIGH 4 BIT ADDRESS REGISTER
Offset: 0x860
Register Name: DEBE_LAYFB_H4ADD_REG
Bit
Read/W
rite
Default/
Hex
Description
31:28
/
/
/