Allwinner A20 - Page 605

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 605 / 812
Offset: 0x24
Register Name: SPI_TC
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
dummy burst when SMC is 1. For saving bus bandwidth, the
dummy burst (all zero bits or all one bits) is sent by SPI
Controller automatically.
0: 0 burst
1: 1 burst
…
N: N bursts
6.3.4.11. SPI FIFO STATUS REGISTER
Offset: 0x28
Register Name: SPI_FIFO_STA
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:25
/
/
/
22:16
R
0x0
TF_CNT
TXFIFO Counter
These bits indicate the number of words in TXFIFO
0: 0 byte in TXFIFO
1: 1 byte in TXFIFO
…
…
63: 63 bytes in TXFIFO
64: 64 bytes in TXFIFO
15:7
/
/
/
6:0
R
0x0
RF_CNT
RXFIFO Counter
These bits indicate the number of words in RXFIFO
0: 0 byte in RXFIFO
1: 1 byte in RXFIFO
…
…
63: 63 bytes in RXFIFO
64: 64 bytes in RXFIFO