Allwinner A20 - Page 612

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 612 / 812
6.4.4.5. UART INTERRUPT ENABLE REGISTER
Offset: 0x04
Register Name: UART_IER
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:8
/
/
/
7
R/W
PTIME
Programmable THRE Interrupt Mode Enable
This is used to enable/disable the generation of THRE
Interrupt.
0: Disable
1: Enable
6:4
/
/
/
3
R/W
0
EDSSI
Enable Modem Status Interrupt
This is used to enable/disable the generation of Modem Status
Interrupt. This is the fourth highest priority
interrupt.
0: Disable
1: Enable
2
R/W
0
ELSI
Enable Receiver Line Status Interrupt
This is used to enable/disable the generation of Receiver Line
Status Interrupt. This is the highest priority interrupt.
0: Disable
1: Enable
1
R/W
0
ETBEI
Enable Transmit Holding Register Empty Interrupt
This is used to enable/disable the generation of Transmitter
Holding Register Empty Interrupt. This is the third highest
priority interrupt.
0: Disable
1: Enable
0
R/W
0
ERBFI
Enable Received Data Available Interrupt
This is used to enable/disable the generation of Received