Allwinner A20 - Page 626

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 626 / 812
Offset: 0x80
Register Name: UART_TFL
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
FIFO.
6.4.4.15. UART RECEIVE FIFO LEVEL REGISTER
Offset: 0x84
Register Name: UART_RFL
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:7
/
/
/
6:0
R
0
RFL
Receive FIFO Level
This is indicates the number of data entries in the receive
FIFO.
6.4.4.16. UART HALT TX REGISTER
Offset: 0xA4
Register Name: UART_HALT
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:6
/
/
/
5
R/W
0
SIR_RX_INVERT
SIR Receiver Pulse Polarity Invert
0: Not invert receiver signal
1: Invert receiver signal
4
R/W
0
SIR_TX_INVERT
SIR Transmit Pulse Polarity Invert
0: Not invert transmit pulse
1: Invert transmit pulse
3
/
/
/
2
R/W
0
CHANGE_UPDATE
After the user using HALT[1] to change the baudrate or LCR
configuration, write 1 to update the configuration and waiting