Allwinner A20 - Page 654

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 654 / 812
Offset: 0x34
Register Name: IR_CIR
Default Value: 0x0000_1828
Bit
Read/Write
Default
Description
15:8
R/W
0x18
ITHR
Idle Threshold for CIR
The Receiver uses it to decide whether the CIR command has
been received. If there is no CIR signal on the air, the receiver
is staying in IDLE status. One active pulse will bring the
receiver from IDLE status to Receiving status. After the CIR is
end, the inputting signal will keep the specified level (high or
low level) for a long time. The receiver can use this idle signal
duration to decide that it has received the CIR command. The
corresponding flag is asserted. If the corresponding interrupt is
enable, the interrupt line is asserted to CPU.
When the duration of signal keeps one status (high or low
level) for the specified duration ( (ITHR + 1)*128 sample_clk ),
this means that the previous CIR command has been finished.
7:2
R/W
0xa
NTHR
Noise Threshold for CIR
When the duration of signal pulse (high or low level) is less
than NTHR, the pulse is taken as noise and should be
discarded by hardware.
0: all samples are recorded into RX FIFO
1: If the signal is only one sample duration, it is taken as noise
and discarded.
2: If the signal is less than (<=) two sample duration, it is taken
as noise and discarded.
…
61: if the signal is less than (<=) sixty-one sample duration, it is
taken as noise and discarded.
1:0
R/W
0
SCS
Sample Clock Select for CIR
SCS
2
SCS[1
]
SCS[0
]
Sample Clock
0
0
0
ir_clk/64
0
0
1
ir_clk/128
0
1
0
ir_clk/256
0
1
1
ir_clk/512
1
0
0
ir_clk
1
0
1
Reserved
1
1
0
Reserved
1
1
1
Reserved