Allwinner A20 - Page 701

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 701 / 812
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Register Name: DA_CTL
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
0: Disable
1: Enable
10
R/W
0
SDO2_EN
0: Disable
1: Enable
9
R/W
0
SDO1_EN
0: Disable
1: Enable
8
R/W
0
SDO0_EN
0: Disable
1: Enable
7
/
/
/
6
R/W
0
ASS
Audio sample select when TX FIFO under run
0: Sending zero
1: Sending last audio sample
5
R/W
0
MS
Master Slave Select
0: Master
1: Slave
4
R/W
0
PCM
0: I2S Interface
1: PCM Interface
3
R/W
0
/
2
R/W
0
TXEN
Transmitter Block Enable
0: Disable
1: Enable
1
R/W
0
RXEN
Receiver Block Enable
0: Disable
1: Enable
0
R/W
0
GEN