Allwinner A20 - Page 732

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 732 / 812
Offset: 0x0C
Register Name: AC_CS
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
22:16
R
0x00
CS_ADDR
Codec status address
15:0
R
0x0000
CS
Codec status data
6.10.7.5. AC97 TX FIFO REGISTER
Offset: 0x10
Register Name: AC_TXFIFO
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
W
0
TX_DATA
Transmitting left, right channel sample data should be
written this register one by one. The left channel sample
data is first and then the right channel sample.
6.10.7.6. AC97 RX FIFO REGISTER
Offset: 0x14
Register Name: AC_RXFIFO
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
R
0
RX_DATA
Host can get one sample by reading this register. If in the
PCM IN mode, the left channel sample data is first and
then the right channel sample
6.10.7.7. AC97 FIFO CONTROL REGISTER
Offset: 0x18
Register Name: AC_FCTL
Default Value: 0x0000_3078
Bit
Read/Write
Default
Description
31:18
/
/
/
17
R/W
0
FTX