Allwinner A20 - Page 735

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 735 / 812
Offset: 0x20
Register Name: AC_INT
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
1: Enable
7
R/W
0
TX_DRQ
TX FIFO Empty DRQ Enable
0: Disable
1: Enable
6
R/W
0
TXUI_EN
TX FIFO Under run Interrupt Enable
0: Disable
1: Enable
5
R/W
0
TXOI_EN
TX FIFO Overrun Interrupt Enable
0: Disable
1: Enable
4
R/W
0
TXEI_EN
TX FIFO Empty Interrupt Enable
0: Disable
1: Enable
3
/
/
/
2
R/W
0
RX_DRQ
RX FIFO Data Available DRQ Enable
When set to “1”, RX FIFO DMA Request is asserted if
Data is available in RX FIFO
0: Disable
1: Enable
1
R/W
0
RXOI_EN
RX FIFO Overrun Interrupt Enable
0: Disable
1: Enable
0
R/W
0
RXAI_EN
RX FIFO Data Available Interrupt Enable
0: Disable
1: Enable