Allwinner A20 - Page 736

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 736 / 812
6.10.7.10. AC97 INTERRUPT STATUS REGISTER
Offset: 0x24
Register Name: AC_ISTA
Default Value: 0x0000_0010
Bit
Read/Write
Default
Description
31:10
/
/
/
9
R/W
0
CODEC_GPIO_INT
Codec GPIO interrupt
0: No pending IRQ
1: Codec GPIO interrupt
8
R/W
0
CR_INT
Codec Ready pending Interrupt
0: No pending IRQ
1: Codec Ready Pending Interrupt
Write “1” to clear this interrupt
7
/
/
/
6
R/W
0
TXU_INT
TX FIFO Under run Pending Interrupt
0: No pending IRQ
1: FIFO Under run Pending Interrupt
Write “1” to clear this interrupt
5
R/W
0
TXO_INT
TX FIFO Overrun Pending Interrupt
0: No Pending IRQ
1: FIFO Overrun Pending Interrupt
Write “1” to clear this interrupt
4
R/W
1
TXE_INT
TX FIFO Empty Pending Interrupt
0: No Pending IRQ
1: FIFO Empty Pending Interrupt
Write “1” to clear this interrupt or automatically clear if
interrupt condition fails.
3:2
/
/
/
1
R/W
0
RXO_INT
RX FIFO Overrun Pending Interrupt
0: FIFO Overrun Pending
Write “1” to clear this interrupt