Allwinner A20 - Page 737

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 737 / 812
Offset: 0x24
Register Name: AC_ISTA
Default Value: 0x0000_0010
Bit
Read/Write
Default
Description
0
R/W
0
RXA_INT
RX FIFO Available Pending Interrupt
0: No Pending IRQ
1: Data Available Pending IRQ
Write “1” to clear this interrupt or automatically clear if
interrupt condition fails
6.10.7.11. AC97 TX COUNTER REGISTER
Offset: 0x28
Register Name: AC_TX_CNT
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
R/W
0
TX_CNT
TX Sample counter
The audio sample number of writing into TX FIFO. When
one sample is written by DMA or by host IO, the TX
sample counter register increases by one. The TX
Counter register can be set to any initial value at any
time. After been updated by the initial value, the counter
register should count on base of this value.
6.10.7.12. AC97 RX COUNTER REGISTER
Offset: 0x2C
Register Name: AC_RX_CNT
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
R/W
0
RX_CNT
RX Sample counter
The audio sample number of writing into RX FIFO. When
one sample is written by Codec, the RX sample counter
register increases by one. The RX Counter register can
be set to any initial value at any time. After been updated
by the initial value, the counter register should count on
base of this value.