Allwinner A20 - Page 756

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Offset: TSG+0x0c
Register Name: TSG_CCR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
TSG Clock Divide Factor (D)
The Denominator part of TSG Clock Divisor Factor.
Frequency of output clock:
Fo = (Fi*(N+1))/(16*(D+1)).
Fi is the input special clock of TSC, and D must not less than
N.
6.13.4.11. TSG BUFFER BASE ADDRESS REGISTER
Offset: TSG+0x10
Register Name: TSG_BBAR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:28
/
/
/
27:0
RW
0x0
TSGBufBase
Buffer Base Address
This value is a start address of TSG buffer.
Note: This value should be 4-word (16 Bytes) align, and the
lowest 4-bit of this value should be zero.
6.13.4.12. TSG BUFFER SIZE REGISTER
Offset: TSG+0x14
Register Name: TSG_BSZR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:24
/
/
/
23:0
R/W
0
TSGBufSize
Data Buffer Size for TS Generator
It is in byte unit.
The size should be 4-word (16 Bytes) align, and the lowest 4
bits should be zero.