Allwinner A20 - Page 761

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 761 / 812
6.13.4.20. TSF OVERLAP INTERRUPT STATUS REGISTER
Offset: TSF+0x1c
Register Name: TSF_OISR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
R/W
0x0
OLPIS
Overlap Interrupt Status
Overlap interrupt Status bits for channel 0~31.
Set by hardware, and can be cleared by software writing ‘1’.
When both these bits and the corresponding Overlap Interrupt
Enable bits set, the TSF interrupt will generate.
6.13.4.21. TSF PCR CONTROL REGISTER
Offset: TSF+0x20
Register Name: TSF_PCRCR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:17
/
/
/
16
R/W
0
PCRDE
PCR Detecting Enable
0: Disable
1: Enable
15:13
/
/
/
12:8
R/W
0
PCRCIND
Channel Index m for Detecting PCR packet (m from 0 to 31)
7:1
/
/
/
0
R
0
PCRLSB
PCR Contest LSB 1 bit
PCR[0]
6.13.4.22. TSF PCR DATA REGISTER
Offset: TSF+0x24
Register Name: TSF_PCRDR
Default Value: 0x0000_0000