Allwinner A20 - Page 763

A20 User Manual (Revision 1.2) Copyright © 2013 Allwinner Technology Co., Ltd. All Rights Reserved. Page 763 / 812
6.13.4.25. TSF CHANNEL DESCRAMBLE ENABLE REGISTER
Offset: TSF+0x38
Register Name: TSF_CDER
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
R/W
0x0
DescEn
Descramble Enable for Channel 0~31
0: Disable
1: Enable
These bits should not be changed during the corresponding
channel enable.
6.13.4.26. TSF CHANNEL INDEX REGISTER
Offset: TSF+0x3c
Register Name: TSF_CINDR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:5
/
/
/
4:0
R/W
0x0
CHIND
Channel Index
This value is the channel index for channel private registers
access.
Range is from 0x00 to 0x1f.
Address range of channel private registers is 0x40~0x7f.
6.13.4.27. TSF CHANNEL CONTROL REGISTER
Offset: TSF+0x40
Register Name: TSF_CCTLR
Default Value: 0x0000_0000
Bit
Read/Write
Default
Description
31:0
/
/
/