System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-53
ID021414 Non-Confidential
[12] I Instruction cache enable. The possible values are:
0
Instruction caches disabled. This is the reset value.
1
Instruction caches enabled.
[11] - Reserved,
RES1.
[10] - Reserved,
RES0.
Table 4-67 SCTLR_EL1 bit assignments (continued)
Bits Name Function
To Next Page
Loading...
