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ARM Cortex-A53 MPCore - Page 134

ARM Cortex-A53 MPCore
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System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-73
ID021414 Non-Confidential
To access the HSTR_EL2:
MRS <Xt>, HSTR_EL2 ; Read HSTR_EL2 into Xt
MSR HSTR_EL2, <Xt> ; Write Xt to HSTR_EL2
[9] T9 Trap coprocessor primary register CRn = 9. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 9 to Hyp mode.
The reset value is 0.
[8] T8 Trap coprocessor primary register CRn = 8. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 8 to Hyp mode.
The reset value is 0.
[7] T7 Trap coprocessor primary register CRn = 7. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 7 to Hyp mode.
The reset value is 0.
[6] T6 Trap coprocessor primary register CRn = 6. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 6 to Hyp mode.
The reset value is 0.
[5] T5 Trap coprocessor primary register CRn = 5. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 5 to Hyp mode.
The reset value is 0.
[4] - Reserved, RES0.
[3] T3 Trap coprocessor primary register CRn = 3. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 3 to Hyp mode.
The reset value is 0.
[2] T2 Trap coprocessor primary register CRn = 2. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 2 to Hyp mode.
The reset value is 0.
[1] T1 Trap coprocessor primary register CRn = 1. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 1 to Hyp mode.
The reset value is 0.
[0] T0 Trap coprocessor primary register CRn = 0. The possible values are:
0
Has no effect on Non-secure accesses to CP15 registers.
1
Trap valid Non-secure accesses to coprocessor primary register CRn = 0 to Hyp mode.
The reset value is 0.
Table 4-75 HSTR_EL2 bit assignments (continued)
Bits Name Function

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