System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-125
ID021414 Non-Confidential
The CPU Auxiliary Control Register can be written only when the system
is idle. ARM recommends that you write to this register after a powerup
reset, before the MMU is enabled, and before any ACE or ACP traffic
begins.
Setting many of these bits can cause significantly lower performance on
your code. Therefore, it is suggested that you do not modify this register
unless directed by ARM.
Configurations CPUACTLR_EL1 is:
• Common to the Secure and Non-secure states.
• Mapped to the AArch32 CPUACTLR register. CPU Auxiliary
Control Register on page 4-269.
Attributes CPUACTLR_EL1 is a 64-bit register.
Figure 4-71 shows the CPUACTLR_EL1 bit assignments.
Figure 4-71 CPUACTLR_EL1 bit assignments
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