ARM Cortex-A53 MPCore - Page 204

System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-143
ID021414 Non-Confidential
c12 0 c9 0 ICC_AP1R0 0x00000000 Active Priorities 1 Register 0
c11 1 ICC_DIR - Deactivate Interrupt Register
3 ICC_RPR - Running Priority Register
c12 0 ICC_IAR1 - Interrupt Acknowledge Register 1
1 ICC_EOIR1 - End Of Interrupt Register 1
2 ICC_HPPIR1 - Highest Priority Pending Interrupt Register 1
3 ICC_BPR1
0x00000003
a
Binary Point Register 1
4 ICC_CTLR
0x00000400 Interrupt Control Register
5 ICC_SRE
0x00000000 System Register Enable Register
6 ICC_IGRPEN0
0x00000000 Interrupt Group Enable Register 0
7 ICC_IGRPEN1
0x00000000 Interrupt Group Enable Register 1
4 c0 0 HVBAR UNK Hyp Vector Base Address Register on page 4-266.
c8 0 ICH_AP0R0
0x00000000 Interrupt Controller Hyp Active Priorities Register (0,0)
c9 0 ICH_AP1R0
0x00000000 Interrupt Controller Hyp Active Priorities Register (1,0)
5 ICC_HSRE
0x00000000 System Register Enable Register for EL2
c11 0 ICH_HCR
0x00000000 Interrupt Controller Hyp Control Register
1ICH_VTR
0x90000003 Interrupt Controller VGIC Type Register
2 ICH_MISR
0x00000000 Interrupt Controller Maintenance Interrupt State Register
3 ICH_EISR
0x00000000 Interrupt Controller End of Interrupt Status Register
7 ICH_VMCR
0x004C0000 Interrupt Controller Virtual Machine Control Register
5 ICH_ELSR
0x0000000F Interrupt Controller Empty List Register Status Register
c12 0 ICH_LR0
0x00000000 Interrupt Controller List Register 0
1 ICH_LR1
0x00000000 Interrupt Controller List Register 1
2 ICH_LR1
0x00000000 Interrupt Controller List Register 2
3 ICH_LR1
0x00000000 Interrupt Controller List Register 3
c14 0 ICH_LRC0
0x00000000 Interrupt Controller List Register 0
1 ICH_LRC1
0x00000000 Interrupt Controller List Register 1
2 ICH_LRC2
0x00000000 Interrupt Controller List Register 2
3 ICH_LRC3
0x00000000 Interrupt Controller List Register 3
6 c12 4 ICC_MCTLR
0x00000400 Interrupt Control Register for EL3
5 ICC_MSRE
0x00000000 System Register Enable Register for EL3
7 ICC_MGRPEN1
0x00000000 Interrupt Controller Monitor Interrupt Group 1 Enable
register
Table 4-132 c12 register summary (continued)
CRn Op1 CRm Op2 Name Reset Description