System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-192
ID021414 Non-Confidential
Configurations SCTLR (NS) is architecturally mapped to AArch64 register SCTLR_EL1.
See System Control Register, EL1 on page 4-50.
There are separate Secure and Non-secure copies of this register.
SCTLR has write access to the Secure copy of the register disabled when
the CP15SDISABLE signal is asserted HIGH.
Attributes SCTLR is a 32-bit register.
Figure 4-98 shows the SCTLR bit assignments.
Figure 4-98 SCTLR bit assignments