System Control
ARM DDI 0500D Copyright © 2013-2014 ARM. All rights reserved. 4-222
ID021414 Non-Confidential
Usage constraints This register is accessible as follows:
If a bit in the NSACR prohibits a Non-secure access, then the
corresponding bit in the HCPTR behaves as RAO/WI for Non-secure
accesses. See the bit description for TASE.
Configurations HCPTR is architecturally mapped to AArch64 register CPTR_EL2.
Attributes HCPTR is a 32-bit register.
Figure 4-110 shows the HCPTR bit assignments.
Figure 4-110 HCPTR bit assignments
EL0
(NS)
EL0
(S)
EL1
(NS)
EL1
(S)
EL2
EL3
(SCR.NS = 1)
EL3
(SCR.NS = 0)
----RWRW -
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